1. Field of the Invention
The present invention relates to solid-state imaging devices and to imaging systems using the same. More particularly, the present invention provides a device structure that is suitable for solid-state imaging devices capable of high-speed read-out.
2. Description of the Related Art
One method of reading out image data at high speeds in an imaging device is to partition the photoelectric conversion region into a plurality of regions, and to read out the charges from these regions in parallel. JP H03-224371A (see FIG. 10), for example, proposes a structure in which the read-out amplifiers are arranged in mirror symmetry (line symmetry). In this solid-state imaging device, signals are output from the pixels arranged in rows and columns in the pixel portions 31 and 32, after having passed through the horizontal charge transfer path 33 and the read-out amplifiers 34 and 35, which are arranged on both ends of the horizontal charge transfer path.
However, when the read-out amplifiers 34 and 35 are arranged in mirror symmetry to one another, their source (S) and drain (D) have to be arranged mirror symmetrically with respect to the gate (G) at the transistor level (see FIG. 11B). Therefore, misalignments occurring during the masking step in the semiconductor manufacturing process are coupled with the influence of injection angle dependencies during the injection of impurities, and it is difficult to manufacture read-out amplifiers with uniform input/output characteristics.
Differences in the characteristics of the read-out amplifiers lead to the problem that blocks can be observed in the image when replaying the image. Moreover, when the data that have been read out are combined and displayed as one image, it is necessary to rearrange the image data, which makes the signal processing troublesome. In the arrangement in FIG. 11A, misalignments during the lithography step have the same influence on different amplifiers, so that they do not lead to differences in the characteristics between amplifiers. However, in the arrangement in FIG. 11B, ion implantation skew and mask misalignments during the manufacturing steps have different effects on different amplifiers, and lead to amplifiers with different characteristics.